1. Field of the Invention
The present invention generally relates to temperature monitoring and power saving arrangements for integrated circuit devices and, more particularly, to on-chip temperature sensors suitable for integration with other circuit elements in memories, processors and logic arrays.
2. Description of the Prior Art
It is well known that the electrical characteristics of virtually all types of circuit elements vary somewhat with temperature because they rely to some degree on the bulk properties of the material. Even relatively stable devices such as inductors and capacitors and even metal connections may change dimensions slightly with changes in temperature and thus exhibit some degree of temperature dependency.
Semiconductors, in particular, are subject to substantial changes in electrical characteristics with temperature. In integrated circuits, digital switching speed, off-current and current drive capability can change dramatically with temperature. Switching threshold is also temperature dependent and may affect circuit performance and function if operating margins are small. Further, the temperature of each transistor is subject to wide variation with recent switching history of the device since CMOS circuits ideally only dissipate heat during the switching transition interval. Some additional resistive heating will occur during the conductive state of CMOS field effect transistors (FETs) and in the off state, as well, if the "off-current", Ioff, is not well-limited to near zero. In general, in processors, memories, logic arrays and the like, power and, hence, temperature rise is proportional to clock frequency.
Temperature dependent changes in electrical characteristics of semiconductor devices derive from several physical effects. For example, the population distribution of charge carriers among energy levels is governed by Boltzmann statistics which ascribe an energy distribution width that is proportional to temperature (kT). The effect of changes in charge carrier population distribution is observed as changes of the current-voltage characteristic of forward biased diodes and transistors in which current is limited by carrier emission over an energy barrier (e.g. developed in an FET at gate voltages below the conduction threshold). This change of population distribution of charge carriers with temperature is a comparatively large effect in FETs biased in the sub-threshold region which increases current (e.g. in the nanoamp range) with increase of temperature.
Further, the mobility of conducting carriers is inversely proportional to the rate of scattering by thermally energized scattering centers. This is a relatively weak effect. Increased scattering tends to increase resistance of simple conduction paths with increased temperature and may aggravate the production of heat in FET transistors.
A still more subtle effect is the movement of the Fermi energy toward the center of the band gap with increasing temperature. This effect causes such parameters as the work function and the voltage switching threshold of FETs to change with temperature. A fourth effect comparable in magnitude to movement of the Fermi energy is the thermal generation of charge carriers in the depletion region of a semiconductor device, such as a reverse-biased diode. The leakage current of a reverse-biased diode is limited by the number of carriers which can reach the junction of the device from a point at which they are thermally generated within a depletion region which is large compared to the distance such charge carriers can travel before recombination.
It should be noted that these four effects are highly distinct from each other in the nature and magnitude of the effects produced and the circumstances under which they can occur. For example, changes in conduction due to changes in charge carrier population distribution (Boltzmann statistics) relative to a barrier produce current changes in the nanoamp range in sub-threshold biased FETs which increase with temperature while decreases in carrier mobility due to scattering tends to decrease current with increasing temperature and to produce current changes in the picoamp range. Similarly, while changes in the Fermi level and thermal carrier generation with temperature cause increases in current with increasing temperature, the changes in current for a given increment of temperature are even more subtle by at least one order of magnitude than those caused by scattering and thus far below changes in sub-threshold current in FETs with temperature.
While temperature may cause significant changes in electrical characteristics of semiconductor devices, high temperatures and thermal cycling can also cause degradation of the reliability of integrated circuits by mechanisms such as metal migration in conductors and unintended impurity diffusion in portions of transistor structures. Therefore, to limit temperature rise near the switching frequency design limits of the integrated circuit, some algorithms have been derived to distribute switching loads across a chip or between chips in accordance with temperature. Thus sensitive monitoring of temperature of semiconductor devices is required to implement such algorithms and support extended duration of high performance operation of the integrated circuits.
Thermocouples can be used to accurately determine the temperature of semiconductor devices. They are known to be rugged and reliable and, once calibrated, of high sensitivity and accuracy. However, thermocouples cannot be integrated into the semiconductor substrate and are usually mounted on the package structure. Additionally, thermocouples also require a second bi-metal contact in another location and at a constant temperature for comparison. This requirement is difficult to meet at best, and impractical or impossible in many applications of integrated circuits such as portable processors.
While thermocouples are, themselves, highly accurate and sensitive, thermocouples attached to integrated circuit packages are decoupled from the chip by the heat path through the package and the rate of heat transfer through the material interfaces therein (and the thermal transfer barriers presented thereby) as well as the thermal mass and specific heat of the package materials from the actual instantaneous temperature of the chip. Further, as chip functionality and integration density increases, local temperature variations on the chip become of increasing importance. Thermocouples cannot discriminate temperature differences across such short distances.
Thermal detectors integrated on chips are useful in many applications. For example, dynamic random access memories (DRAMs) capable of storing several megabits of data are now within the purview of commercial manufacturing techniques. Such memories must be periodically refreshed which consumes a significant portion of operating time and limits periods during which the memory can be accessed. The required refresh rate of DRAMs depends directly on temperature. The refresh operation is, itself, a significant contributor to chip heat.
Present refresh schemes assume that each DRAM is operating at its maximum temperature which is an increasingly less well-founded assumption as the size of DRAMs is increased and increased numbers of DRAMs are employed since maximum temperature conditions are typically only reached at high ambient temperature and immediately after a period of heavy, high-speed, continuous use. Accordingly, if temperature can be accurately monitored, the period of accessibility of the memory can be increased and stand-by power consumption limited to only that which is actually necessary. It should be understood that a reduction of refresh rate not only limits stand-by power consumption directly, but reduced refresh rate also reduces heat generation, further reducing temperature and required refresh rate. This further reduces power consumption which is of substantial importance where battery power is relied upon, such as in portable computers. similarly, in processors, power consumption and heat generation is a function of operating temperature. It has been demonstrated that significant reductions in power consumption can be achieved by algorithms which reduce processor temperature. Again, power consumption is of particular importance in portable processors which rely on battery power and in which temperature excursions are more likely to be large since portable processors generally do not include cooling fans. Therefore, it can be appreciated that substantial improvements in power consumption, reliability and the like can be achieved and processor and memory performance maximized when operations are based on actual chip temperature rather than assumed worst case conditions or based on temperature sensors which are decoupled from instantaneous actual chip temperature.
While some efforts have been made to provide an on-chip temperature sensor, success in achieving the potential performance improvements noted above has been limited. As noted above, several temperature dependent effects on electrical characteristics of semiconductors are quite subtle and may be comparable to noise in high speed switching circuit chip environments. For example, leakage of reverse-biased diodes has been used as an on-chip temperature sensor. However, reverse-biased diode leakage currents are typically in the picoamp range and are easily masked by other leakage mechanisms or by noise. Additionally, diode leakage characteristics are not generally monitored as part of normal integrated circuit manufacturing processes and thus the introduction of other leakage mechanisms may go undetected during manufacture.
More specifically, reverse biased diode leakage is due to carriers which are thermally generated within the junction depletion layers or carriers which are generated within a diffusion length of the junction and subsequently diffuse to the junction without recombining. Those carriers reaching the high electric field of the depletion region, due to the applied reverse bias, are accelerated by the field and contribute to the observed current. Although these two leakage current components are distinguishable, the resultant leakage currents are very small, in the picoamp or sub-picoamp range, and the changes due to temperature are correspondingly very small.
Thermal carrier generation is thus a relatively weak effect compared to changes in sub-threshold current in FETs, yielding current changes in the picoamp and fractional picoamp ranges for temperature excursions of interest and extremely variable with very small variations in device geometry. Reduction of the contribution of thermal carrier generation in reverse-biased diode leakage (e.g. to reduce variability) requires the use of extremely pure silicon, a lightly doped graded junction and contacts remote from the junction; all of which increase process cost and complexity and are, to some degree, inconsistent with other requirements of high density integration. Further, reduction of the current component of diode leakage due to thermal carrier generation to levels at all comparable to those due to changes of charge carrier population distribution with temperature, for whatever reason, reduces current level changes to levels comparable to noise.
Further, the temperature sensor itself must have low power consumption, produce little heat itself (which would interfere with the accuracy of measurement). Neither should the sensor produce performance-compromising heat, especially in portions of the chip local to the sensor where temperature would presumably be of particular importance due to high switching speed. Such production of heat would also be counter-productive to overall savings in power consumption. Further, the sensor circuit should ideally produce a relatively large signal which is immune to noise.
For example, in U.S. Pat. No. 5,357,149 to Kimura, a differential pair of field effect transistors is integrated on a semiconductor chip with the transistors in a similar orientation, presumably for common-mode noise rejection. The ratio of width to length of the respective transistors differs from each other but a feedback circuit is provided to alter gate voltage in one of the transistors such that the current is maintained equal in both transistors. This circuit must be operated in a relatively high current regime above the threshold on an FET and produces a signal derived from changes in carrier mobility with temperature which, as discussed above, is a relatively weak effect.